Method and system for determination of rotor angle of synchromechanism

ABSTRACT

Synchromechanism outputs in alternating current (AC) waveform are processed by signal conditioning and integrating circuitry, converted from analog voltages to digital amplitude equivalents, and supplied as inputs to a digital processor. High accuracy in the conversion of synchro output to digital representation of synchro angle or position is achieved by a unique computation on the converted synchro output such that common forms of electrical noise which normally limit accuracy are canceled in the computation process. Further, techniques in signal integration and end-to-end circuitry calibration are employed in a compatible manner to enhance the inherent advantages of digital processing. The synchro to digital conversion scheme accommodates variations in signal processing to meet requirements of speed, accuracy and cost.

United States Patent Avellar et al.

l lMalch 13, 1973 METHOD AND SYSTEM FOR 3,443042 3mm Perreti .235/186 )4DETERMINATION OF ROTOR ANGLE 0F SYNCHROMECHANISM Primary Examiner-Benjamin Doheck Almmey-F. H. Henson ct al. [75] Inventors: Karl B.Avellar, Ellicott City, Md.;

James E. Buchanan, Bowie, Ohio; [57' ABSTRACT Edward R. Higgins, North ILimhicum Md. Synchromechamsm outputs in alternating current (AC)waveform are processed by signal conditioning Asslgneei wesilnEhouseElect? corPonfiona and integrating circuitry, converted from analogvolt- Pmsburghages to digital amplitude equivalents, and supplied as[22] F-edt Feb. 2 1972 inputs to a digital processor. High accuracy inthe conversion of synchro output to digital representation of PP 222.764synchro angle or position is achieved by a unique computation on theconverted synchro output such [52] U 8 Cl M81654 235/186 235/189 thatcommon forms of electrical noise which normally [5 I] d 1/06 limitaccuracy are canceled in the computation [58] I89 I90 process. Further,techniques in signal integration and 5 end-to-end circuitry calibrationare employed in a compatible manner to enhance the inherent advantagesof digital processing. The synchro to digital [56] References Citedconversion scheme accommodates variations in signal UNITED STATESPATENTS prpicessing to meet requirements of speed, accuracy an cost.3,612,977 l0/l97l Perrett ..3l8/654 3,646,337 2/1972 Bifulco ..3l8/654 X16 Claims, 7 Drawing Figures PFiOCESfJOR TO OTHER INPUT AMPLIFIERS{INPUT cmcunmr WJIPLEXERS lNTEGRATORS SCALING AwuFiERs i LEXHRS H l 7 51i4 53 I 1 CALIBRATION VOLTAGE X 4 1 i3 8 l5 H I? SYNCHRO Y M g o4| Z I48 1B 3B y I DC-A/D HOLDING I CONVERTER REGISTERS l ZERO CROSSING w Lyca A REE [BITAL DATA 20 DlGlTAL PROCESSOR PATENTEDHAR 1 3 1975 3 720.866

f\ rFIGB AID of E l N00? e z FIG. '5

%DEGREES -so -so -30 0 +30 +60 +90 move +sao (DUNTER- CLDCKWISE ROTORROTATION METHOD AND SYSTEM FOR DETERMINATION OF ROTOR ANGLE OFSYNCIIROMECIIANISM BACKGROUND OF THE INVENTION 1. Field of the InventionThis invention relates to the processing of synchromechanism signaloutputs employing both analog and digital techniques with computationsper formed by a digital processor.

2. State of the Prior Art Systems employing synchromechanisms with ACanalog voltage output require analog to digital conversion in order topermit digital processing in the determination of synchro angle orposition. In prior art conversion systems, each of the two or moresynchro outputs is converted from analog to digital form, providingdigital numbers corresponding to the analog amplitudes of the synchrooutputs. Since the amplitude relationship among the synchro outputs isunique for a given synchro shaft position or angle relative to areference, simple trigonometric relationships are solved to yield theangle. In practice, the individual synchro signals are distorted due toelectrical noise, non-sine wave excitation drive to the synchro, andnonlinearities in the signal processing circuitry. Calibrationtechniques have been developed for reducing these and other effects ofcircuitry non-linearities, but noise and distortion limit the accuracywith which the measurement of synchro angle or position has heretoforebeen achieved with a digital processor. Only at increased expense andcomplication of circuitry could accuracies better than 0.05 percent berealized in prior art systems.

Concerning speed of conversion in terms of time to compute the synchroangle, prior techniques first demodulate and filter, or just filter, thesynchro AC output signals and then convert the resulting direct current(DC) voltage to a digital equivalent of magnitude. To achieve highaccuracy, ripple in the DC voltage must be reduced to less than 0.lpercent of signal amplitude; however, techniques for ripple reductionimpose an undesirable time delay in the conversion process. Forapplications where the synchro output signals are changing rapidly inamplitude, in accordance with relatively rapid rates of synchro shaftrotation, time delays equal only to even a few cycles of the synchroexcitation frequency are prohibitive. The consequence therefore has beendecreased accuracy with increases in conversion speed.

This defect in particular is overcome by the conversion technique of thepresent invention, which is operable to permit conversions in less thanone-half a cycle of the excitation frequency while still attainingsignificant noise rejection and high accuracy.

SUMMARY OF THE INVENTION In accordance with the present invention,analog and digital circuitry processes synchromechanism output voltagesto derive from the trigonometric relationships of the output voltageamplitudes as converted to digital number equivalents, the synchroangle, or position. Each synchro output voltage is a time varyingwaveform, the frequency of which is established by the AC referenceexcitation voltage and the amplitude and phase of which are determinedby the geometric relationship of windings within the structure of thesynchro and, in particular, the angular position of the AC referencewinding of the rotor with respect to the individual output windings ofthe stator.

Each output signal first is processed by analog circuitry to obtain avoltage amplitude which then is sampled at specified time intervals forconversion to digital number values for digital processing. A convenienttime reference for a sample interval is the period of the AC referenceexcitation voltage. For each cycle of the AC reference voltage, eachsynchro output voltage is cyclical and of the same period as thereference, but differs in amplitude from a possible zero voltage to amaximum voltage in accordance with the winding ratio, or transformerproperties, of the synchro. The phase relationships of synchro outputcycles to the AC reference cycles are either in phase, corresponding tohalf the possible alignment positions of rotor and stator, or out ofphase for the other half of the possible alignment positions. During asample time equal to or less than one-half a cycle of the AC referencevoltage, each synchro output voltage will comprise a positive, anegative, or a zero amplitude, varying in accordance with the synchroangular position.

The geometry of the synchro construction is known, whereby amplitude andphase relationships between output voltages can be used in thecalculation of synchro angular position. The invention employs aparticular choice of trigonometric relationships in the synchro outputvoltages, such that interference in the output voltages originating fromnoise common to all outputs, as well as from distortions in the ACreference voltage itself, can be canceled, yielding an accuratemeasurement of true synchro voltages. To aid further in the eliminationof measurement errors, calibration techniques are employed to set theamplitude gain of the analog circuitry such that the digital numberderived for each synchro output is highly accurate. The conversiontechnique of the invention can determine the angular position of asynchro to an accuracy of at least 0.05 percent. Furthermore, the highlyaccurate conversion is made within one-half cycle or less of the ACreference frequency.

The speed of a digital processor therefore is used to maximum advantagein calculating the angular position of a synchro. Changes in synchroposition can be measured from cycle to cycle of the AC referencefrequency, while realizing the full accuracy of the technique. Thiscapability alone represents a significant advancement in the state ofthe art. To further enhance the accuracy of the technique while againutilizing the speed of the digital processor, periodic calibration isperformed on amplifying and converting elements on an end-to-end basis.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a block diagram of thesynchro output to digital conversion system of the invention.

FIG. 2 is a detailed circuit of the integrator element and multiplexswitching.

FIG. 3 shows voltage and gating waveforms occurring in the analogprocessing.

FlG. 4 diagrams a typical three wire synchro circuit.

FIG. 5 illustrates synchro output amplitude and phase relationships.

FIG. 6 depicts the vector angle relationships between synchro rotorangle and stator windings.

FIG. 7 details the amplifier calibration switching.

DETAILED DESCRIPTION OF THE INVENTION With reference to the drawings andFIG. 1 in particular, a specific implementation of the invention ispresented. Synchro 1 receives AC reference voltage 6 which ischaracterized herein as a sine wave of amplitude A and frequency wt.Synchro rotor 2 is shown schematically to rotate; according to theprinciples of a three output synchro, there are produced output voltagesX on lead 3, Y on lead 4, and Z on lead 5. Voltage Z is chosen to be acommon voltage point and lead 5 therefore is shown schematically asconnected to system ground. Voltages X and Y, relative to Z and hence toground, are proportional to the rotors position which, in turn,corresponds to an angular position. Voltage X is amplified by amplifier7 and voltage Y is amplified by amplifier 8 such that the maximumvoltages related to synchro outputs X and Y are properly scaled to thevoltage requirements of subsequent circuit elements. Amplifier 9 servesas a zero crossing detector such that its output is discrete in nature,the amplifier 9 functioning to turn on or off precisely at the time thatthe AC reference sine wave voltage passes through zero volts.

Switch elements 54A and S48, also labeled l2 and 13 respectively, areassociated with an end-to-end calibration technique, wherein a knowncalibration voltage periodically is applied as an input to each ofbuffer amplifiers 7 and 8. At each such calibration time the digitalprocessor 20 is programmed to measure the linear amplification of theseries circuit elements. This is achieved simply by dividing the voltageinput to the processor by the known calibration voltage. Switch elementsSlA, SIB, 83A, and 835, also labeled as 14, 15, l6, 17, respectively,are associated with multiplexing functions which may be employed herein,and will be discussed subsequently.

Integrating amplifiers l0 and 11 receive amplified voltages X and Y,respectively, as inputs, the time duration of integration of each beingdetermined by the discrete output of detector 9. The functioning of thispart of the circuit is more clearly understood in FIG. 2. Integratorsand 11 are shown illustratively as comprising operational amplifierswith RC time constant circuits of capacitors 30 and 31 and resistors 32and 33, respectively. In operation, for example, with switch 82A closed,amplifier 10 can have only near zero gain and, hence, output voltage Eis near zero. The same observations apply as to E ,,2 and E 2.

With switch 82A open, however, capacitor 30 becomes functional in thecircuit, in association with resistive element 32, whereby the amplifier10 integrates the input voltage E In practice, the closing of switchesSI and S2 is controlled by the output of the zero crossing detector 9,causing the integrator to function on only a selected portion of theinput voltage. Switches 53A and S38 are provided to permit selection ofthe integrator outputs, whereby the A/D converter 21 may process bothintegrator outputs in sequential time multiplexed fashion.

The aforediscussed circuit functions may be visualized more readily fromthe waveforms of FIG. 3. Switches 81A and SIB gate E and E,,,2respectively to integrators l0 and 11. The gating-on time is shown tocoincide with the positive one-half cycle of the input sine wave.Integration is shown to be enabled, by the opening of switches 82A and8213, for nearly a full cycle of input, more precisely, the interval forintegrating initiates with the first zero crossing of the sine wave inthe positive-going direction, and persists past the time of one-half acycle only for so long as is required by the output circuit switchingtime. The integrators l0 and 11 operate to hold, or maintain, theirrespective output voltages, which then are gated, sequentially, byoutput voltage switches 83A and S38 to the A/D converter 21 shown inFIG. 21. Upon completion of the A/D conversion, switches SZA and SZB areclosed, under control of the processor 20, to reduce the integratoroutput voltage to zero and prepare the integrator for receiving an inputon the next cycle of E and E,,,2, respectively.

Integration of one-half cycle of a sine wave is expressed mathematicallyas:

J A Sin wl.= A (ms 1 (I 11) n showing that a non-alternating voltageresults where A is the amplitude of the input sine wave and w (21r)xfrequency, i.e., a radian measure of frequency.

To further illustrate the case where rotor position is such thatvoltages X and Y are 180 out of phase, E,,,2 would be integrated toyield a negative non-alternating voltage E 2. Mathematically, thiscorresponds to the more general expression of:

1 2A J; AS1n(wt+) (2) where 4: is either 0 or 180, causing the signreversal. In FIG. 3, of course, E and E,,,2 could be in phase althoughfor the more general case, are shown as 180 out of phase.

The geometry of a three output synchro is shown, typically, as in FIG.4. Each of the three windings, yielding output voltages X, Y and Z, isdisplaced relative to the others. Note that the rotor can assume anyangular position from 0 to 360. The voltage output relationship betweenany pair of outputs, such as X and Y, therefore can be plotted as inFIG. 5. Herein, the zero degree axis is selected to coincide with thezero voltage crossing of the waveform of signal Y.

Returning now to FIG. 1, the outputs of integrators i0 and II, asselected by switches SSA and 83B, are converted from analog to digitalform in converter 21 and held temporarily in holding register 22 forinput to the digital processor 20.

The digital processor 2.0 may be a state of the art arithmetic andcomputational unit which solves for the synchro angle employing thedigital numbers presented, time multiplexed, at the holding register 22.Significant operations in the digital processor are:

l Calculation of synchro angle;

2. Measurement of amplifier gains during calibration; and

3. Correction of calculated synchro angle based on calibration.

Calculation of synchro angle is based on the following equations:

X,=KSin r-H1 (3) where X, the scaled digitized amplitude X afterintegration',

l,=the scaled digitized amplitude Y after integration;

K an amplitude factor;

p. the angular position of the synchro rotor;

a, the permanent angular position of winding X (FIG. 4); and

a, the permanent angular position of winding Y (FIG. 4). To understandmore clearly the relationships of 0,, a, and a, FIG. 4 can be drawn invector coordinates as shown in FIG. 6. Locating zero degrees arbitrarilyas shown, angles a, and a, are located to indicate an angulardisplacement of 120 relative to each other. Rotor angle p. may thenassume any value within 360 of rotation. The sine wave relationship ofequations 3 and 4 is readily derived from the vector relationships ofFIG. 6 and is as shown in FIG. 5.

Amplitude factor K of equations 3 and 4, above, is related directly toamplitude A of FIG. 5. Equations 1 and 2 further substantiate that theoutput of the integrators I and II, FIG. I, are indeed proportional tothe output voltages X and Y of the synchro and differ only by theconstant relationship of 2/w where w is the radian rate of the ACreference voltage. As will be seen subsequently, however, it is notnecessary to know the value of K in order to solve equations 3 and 4 forthe synchro angle a. In fact, the independence ofp. on K is an essentialfeature of the invention and permits amplitude distortions occurring inoutput voltages X and Y to cancel in the computation for angle a.Amplitude factor K then is understood to include the true synchro outputvoltage plus noise voltages and distortions which are common to both Xand Y output voltages.

The calculation for angle p. is performed in the digital processor, inaccordance with the trigonometric relationships of equations 3 and 4 andthe known quantitles of angles a, and a as follows. First, equation 3 ismultiplied by cos a,,:

Xcosa,,=Kcosa,,Sin (p.+a,) (5) Expanding the sine of two angles ofequation (5) yields:

X cos a,,= K cos 0,, (cos a sin a, sin ,1. cos a,) s Multiplying out;then yields:

X cos a, K(cos p. cos a, sin i1, sin p. cos a cos a (7) Multiplyingequation (4) by cos a, yields:

Ycos a, K(cos f cos a, sin a, sin 5 cos a, cos a 3 Subtracting equation(6) from (5) yields:

X cos a, I cos a, K cos t (cos a, sin a,cos a, sin

n) (9) In like manner a second equation can be developed which involvesthe sine of angles a, and 4,:

X sin a, I sin a, K sin y. (sin 0, cos a,-sin 0,, cos

Computation continues by squaring the right-hand side of equations (9)and (I0) and, for convenience, each is equated to a term T:

(T,)"'= K sin (sin 0, cos a, sin a, cos a,)* (l2) (7}) K sin'u (sin a,cos a, sin 0,, cos a,) Adding equations (l l) and (12) and taking thesquare root gives:

l, equation (13) (T) T,')" K(cos a, sin a, sin a, cos 0,) (I4) Furthermultiplication of T and T, respectively by (T, TI) as a denominatorgives the desired results:

T,/(T,'+ T,)"'= [K cos 1. (cos a, sin a, cos a, sin

a,)]/AO[K(cos a, sin a sin a cos a,)] cos p. (15) T,/( T, TE) [K sin t(cos a, sin a, cos a, sin

a,,)]/AO[K(cos a sin a, sin 0,, cos a,)] sin (16) The validity ofsolutions (15) and (I6) follows from examining equations (9) and (I0)where it is seen that there are only two unknowns, cos p. and sin a, allother terms are known, i.e. angles a, and a, are known and hence thentrigonometric values and terms X and Y are measured by the circuitry ofFIG. I. Most significant in this derivation is the cancclation ofamplitude term K which appears in both the numerator and denominatorofequations l5) and l6) and therefore divides out in the expressions.

It will be appreciated therefore that the digital processing equipmentoperates on the terms of the left side of the equations (9) and (I0),then squares the resulting values in accordance with the equations (1 land (I2). The square root of the sum of these squares then is producedas per equation (13) and the resulting value which then forms thedenominator for equations (15) and (I6). Equations(l5) and (I6) thenyield cos p. and sin a, from either of which the rotor angular positionmay be determined. Although only one of these terms is necessary todefine the rotor position, obvious advantages are available fromderiving both thereof.

Calibration of the circuitry amplifier gain is accomplished as shown inFIG. 7. Periodically, i.e., interspersed infrequently with synchrooutput voltage processing, reference voltages of precisely known amplitude and shown in FIG. 7 as opposite polarity reference signals) arepresented as input signals to amplifiers 7 and 8 in FIG. 1 by closingswitches 30 and 31, in FIG. 7, this function is illustrated for a singlesignal channel of FIG. 1, including a switch 30, amplifier 32,integrator 33 and A10 converter 34 corresponding for example to switch54A, amplifier 7, integrator 10 and All) converter 21 A/D conversion isperformed for each reference input to each channel of FIG. I. Thedigital processor controls the calibration cycle and stores the measuredamplifier gain for both X and Y voltage correction. The correction isapplied, essentially, in equations (3) and (4) where X, and Y, arecorrespondingly increased or decreased in digital value to correct forany differences in circuit amplification. The digital processor appliesstraight line corrections according to:

y ax b (l7) where a is equivalent to gain, b is equivalent to a constantdifference or offset and x is the digital number presented by the A/Dconverter 34.

The multiplexer switches SlA, SIB, 83A, 53B of FIG. 1 permit timesharing of the A/D converter 21 and the holding register 22. The digitalprocessor, in control of multiplexing, properly processes the switchedinputs. Adjustments in accordance with periodic calibration by thistechnique operates to remove errors due to differences in inputchannels.

it will be understood that the system is operable with a greater orsmaller number of synchro inputs than are shown. For example, it isoperable with a single line synchro input although much of the errorcorrection is lost this, however, can be regained in substantial part byprocessing the AC reference excitation voltage as a further signal.Further, when a greater number of inputs is used, i.e. greater than onepair, the values may be scaled by the input scaling, or buffer,amplifiers to a common range, permitting use of an integrator with fixedgain. As well, switches 81A and S18 are to be understood as inputmultiplexing switches used to select a given pair of input amplifiers.

The integration time heretofore discussed in terms of one-half a cycleof AC reference frequency can be decreased if desired to increase therate of conversion from analog amplitudes to digital numbers.Alternatives possible within the context of the invention include doubleintegration on both half cycles of output voltages X and Y, therebydoubling the speed of conversion. This technique, however, requires useof two sets of integrators. A pair of analog sample and hold circuitsmultiplexed to the outputs of the integrators may be provided for eachsynchro input. The integrator may then cycle on the inputs so that thesample and hold circuits could be continuously refreshed, affording DCoutputs voltages proportional to the input signals. The delay associatedwith the integration time, in association with the delay in attaining azero crossing as in the disclosed systems then may be avoided. Finally,a pair of digital holding registers may be provided for each input fromthe synchro, which are continuously refreshed by each of the X and Yvalues as converted from analog. The processor thereby would haveavailable at all times, for immediate processing, up-to-date data forany given input channel.

Numerous modifications and adaptations of the system and technique ofthe switches will be apparent to those skilled in the art, and thus itis intended by the appended claims to cover all such modifications andadaptations as fall within the true spirit and scope of the invention.

What is claimed is:

1. For use with a synchromechanism having a rotor winding energized by areference excitation voltage and stator windings of known geometry, asystem for determination of the rotor angular position comprising:

means for deriving from the synchromechanism two related output voltagescorresponding to voltages induced in two stator windings,

means for sampling the output voltages to derive re- LII lated samplesof the form X K sin (p a and Y 6 K sin (y. a,) where a, and a, are theknown, permanent angular relationships of the two stator windingsrelative to a reference, a is the rotor angle relative to that samereference, and K is a common amplitude factor for the related samples,including noise and distortion voltage amplitudes common to the tworelated samples,

means for processing the said related samples to determine the rotorangle u in accordance with one of:

M= CK J+ E) (1) T X cos a, Y cos a,, and

T,= X sin a, Y sin a, and wherein the factor K is canceled and theeffects of noise and distortion voltage amplitudes included in thefactor K correspondingly are eliminated from the value ,1. thusdetermined.

2. A system as recited in claim 1 further comprising:

analog to digital converter means for digitizing the samples of theoutput voltages, and

said processing means comprises a digital processor for receiving thedigitized output voltage samples.

3. A system as recited in claim 2 further comprising:

switching means selectively operable to alternately select said samplesfor supply to said analog to digital converter, and

a holding register for receiving digitized samples from said analog todigital converter for supply of said related digitized samples to saiddigital processor, for processing.

4. A system as recited in claim 1 wherein said sampling means comprises:

integration means responsive to the output voltages to developintegrated values for the said samples thereof over a predeterminedintegration interval, and

means responsive to the period of the reference excitation voltage toestablish the integration interval.

5. A system as recited in claim 4 wherein there is further providedswitching means associated with said integration means and selectivelyoperated by said means responsive to the period of the referenceexcitation voltage normally to disable said integration means andthereby clear the results of the integration function thereof for priorsamples and selectively to enable the integration means to effectintegration of the output voltages during each successive integrationinterval.

6. A system as recited in claim 4 wherein there exist plural sets of tworelated output voltages respectively corresponding to plural sets ofrelated stator windings, and wherein:

said integration means includes two individual integrators respectivelyreceiving the two output voltages of each set thereof, and there isfurther provided:

input multiplexing switches controlled by said processing means forselecting the related output voltages of each set, in succession, forsupply to the respectively corresponding integrators.

7. A system as recited in claim 6 wherein there is further provided:

switching means associated with said integrators,

an analog to digital converter,

said switching means being controlled by said processing means foralternately selecting said integrated voltage samples from saidintegrators for supply to said analog to digital converter, and

a holding register for receiving the digitized and integrated voltagesamples from said analog to digital converter to afford simultaneoussupply of said related digital samples to said digital processor forprocessing thereby.

8. A system as recited in claim 4 wherein said means responsive to theperiod of the reference excitation voltage com prises a zero crossingdetector.

9. A system as recited in claim 8 wherein said zero crossing detector isresponsive to the reference excitation voltage to define the integrationinterval to coincide with a half cycle of the reference excitationvoltage.

10. A system as recited in claim 4 wherein there is further providedscaling amplifiers for receiving and scaling said output voltages forsupplying scaled voltages to said integration means of said samplingmeans in accordance with an acceptable input voltage range of saidintegration means.

11. A system as recited in claim 1 wherein there is further provided:

calibration means including a reference calibration voltage andselective switching means controlled by said processing means forperiodically supplying the calibration voltage to said sampling means inlieu of said output voltages, and

said processing means responds to the sample values derived from saidperiodic calibration voltages to correct for differences inamplification to which said output voltages from said stator windingsare subjected prior to input to said processing means.

12. A method for determining the rotor angular position of asynchromechanism including stator windings of known geometry and whereinthe rotor winding is energized with a reference excitation voltage,comprising:

selecting two output voltages from two selected stator windings,

Ill

sampling the output voltages to derive related samples of the form X Ksin (y. (1,) and Y= K sin (y. a where a, and a, are the known permanentangular relationships of the two stator windings relative to areference, ,1. is the rotor angle relative to that same reference, and Kis a common amplitude factor for the related samples including commonnoise and distortion voltage amplitudes common to the two samples,processing the said related samples to determine the rotor angle p. inaccordance with one of:

cos i c c m and sinpr=T,/(TJ+T,)" 2) where T Xcos a,, Ycosa,, and T, -Xsin a, Ysin a, and wherein the factor K is canceled and the effects ofnoise and distortion voltage amplitudes included in the factor Kcorrespondingly are eliminated from the value t thus determined.

13. The method of claim [2 wherein the sampling ste further comprisesintegrating each of the input vo ages over preselected, periodic timeintervals as a function of the reference excitation voltage.

14. The method of claim 13 further comprising: digitizing the integratedsample values for each integration interval, and processing thedigitized values of said related samples. 15. The method of claim 14further comprising: alternately selecting the integrated sample valuesfor each related set thereof for digitizing thereof by an analog todigital converter in a time shared relationship, and storing thedigitized sample values of the related output samples for simultaneousprocessing thereof. 16. The method of claim 13 further comprisingselecting the periodic integration intervals to correspond to successivehalf cycles of the reference excitation voltage.

1. For use with a synchromechanism having a rotor winding energized by areference excitation voltage and stator windings of known geometry, asystem for determination of the rotor angular position comprising: meansfor deriving from the synchromechanism two related output voltagescorresponding to voltages induced in two stator windings, means forsampling the output voltages to derive related samples of the form X Ksin ( Mu + ax) and Y K sin ( Mu + ay) where ax and ay are the known,permanent angular relationships of the two stator windings relative to areference, Mu is the rotor angle relative to that same reference, and Kis a common amplitude factor for the related samples, including noiseand distortion voltage amplitudes common to the two related samples,means for processing the said related samples to determine the rotorangle Mu in accordance with one of: cos Mu Tc/(Tc2 + Ts2)1/2 (1) and sinMu Ts/(Tc2 + Ts2)1/2 (2) where Tc X cos ay - Y cos ax, and Ts -X sinay + Y sin ax and wherein the factor K is canceled and the effects ofnoise and distortion voltage amplitudes included in the factor Kcorrespondingly are eliminated from the value Mu thus determined.
 1. Foruse with a synchromechanism having a rotor winding energized by areference excitation voltage and stator windings of known geometry, asystem for determination of the rotor angular position comprising: meansfor deriving from the synchromechanism two related output voltagescorresponding to voltages induced in two stator windings, means forsampling the output voltages to derive related samples of the form X Ksin ( Mu + ax) and Y K sin ( Mu + ay) where ax and ay are the known,permanent angular relationships of the two stator windings relative to areference, Mu is the rotor angle relative to that same reference, and Kis a common amplitude factor for the related samples, including noiseand distortion voltage amplitudes common to the two related samples,means for processing the said related samples to determine the rotorangle Mu in accordance with one of: cos Mu Tc/(Tc2 + Ts2)1/2 (1) and sinMu Ts/(Tc2 + Ts2)1/2 (2) where Tc X cos ay - Y cos ax, and Ts -X sinay + Y sin ax and wherein the factor K is canceled and the effects ofnoise and distortion voltage amplitudes included in the factor Kcorrespondingly are eliminated from the value Mu thus determined.
 2. Asystem as recited in claim 1 further comprising: analog to digitalconverter means for digitizing the samples of the output voltages, andsaid processing means comprises a digital processor for receiving thedigitized output voltage samples.
 3. A system as recited in claim 2further comprising: switching means selectively operable to alternatelyselect said samples for supply to said analog to digital converter, anda holding register for receiving digitized samples from said analog todigital converter for supply of said related digitized samples to saiddigital processor, for processing.
 4. A system as recited in claim 1wherein said sampling means comprises: integration means responsive tothe output voltages to develop integrated values for the said samplesthereof over a predetermined integration interval, and means responsiveto the period of the reference excitation voltage to establish theintegration interval.
 5. A system as recited in claim 4 wherein there isfurther provided switching means associated with said integration meansand selectively operated by said means responsive to the period of thereference eXcitation voltage normally to disable said integration meansand thereby clear the results of the integration function thereof forprior samples and selectively to enable the integration means to effectintegration of the output voltages during each successive integrationinterval.
 6. A system as recited in claim 4 wherein there exist pluralsets of two related output voltages respectively corresponding to pluralsets of related stator windings, and wherein: said integration meansincludes two individual integrators respectively receiving the twooutput voltages of each set thereof, and there is further provided:input multiplexing switches controlled by said processing means forselecting the related output voltages of each set, in succession, forsupply to the respectively corresponding integrators.
 7. A system asrecited in claim 6 wherein there is further provided: switching meansassociated with said integrators, an analog to digital converter, saidswitching means being controlled by said processing means foralternately selecting said integrated voltage samples from saidintegrators for supply to said analog to digital converter, and aholding register for receiving the digitized and integrated voltagesamples from said analog to digital converter to afford simultaneoussupply of said related digital samples to said digital processor forprocessing thereby.
 8. A system as recited in claim 4 wherein said meansresponsive to the period of the reference excitation voltage comprises azero crossing detector.
 9. A system as recited in claim 8 wherein saidzero crossing detector is responsive to the reference excitation voltageto define the integration interval to coincide with a half cycle of thereference excitation voltage.
 10. A system as recited in claim 4 whereinthere is further provided scaling amplifiers for receiving and scalingsaid output voltages for supplying scaled voltages to said integrationmeans of said sampling means in accordance with an acceptable inputvoltage range of said integration means.
 11. A system as recited inclaim 1 wherein there is further provided: calibration means including areference calibration voltage and selective switching means controlledby said processing means for periodically supplying the calibrationvoltage to said sampling means in lieu of said output voltages, and saidprocessing means responds to the sample values derived from saidperiodic calibration voltages to correct for differences inamplification to which said output voltages from said stator windingsare subjected prior to input to said processing means.
 12. A method fordetermining the rotor angular position of a synchromechanism includingstator windings of known geometry and wherein the rotor winding isenergized with a reference excitation voltage, comprising: selecting twooutput voltages from two selected stator windings, sampling the outputvoltages to derive related samples of the form X K sin ( Mu + ax) and YK sin ( Mu + ay) where ax and ay are the known permanent angularrelationships of the two stator windings relative to a reference, Mu isthe rotor angle relative to that same reference, and K is a commonamplitude factor for the related samples including common noise anddistortion voltage amplitudes common to the two samples, processing thesaid related samples to determine the rotor angle Mu in accordance withone of: cos Mu Tc/(Tc2 + Ts2)1/2 (1) and sin Mu Ts/(Tc2 + Ts2)1/2 (2)where Tc X cos ay - Y cos ax, and Ts -X sin ay + Y sin ax and whereinthe factor K is caNceled and the effects of noise and distortion voltageamplitudes included in the factor K correspondingly are eliminated fromthe value Mu thus determined.
 13. The method of claim 12 wherein thesampling step further comprises integrating each of the input voltagesover preselected, periodic time intervals as a function of the referenceexcitation voltage.
 14. The method of claim 13 further comprising:digitizing the integrated sample values for each integration interval,and processing the digitized values of said related samples.
 15. Themethod of claim 14 further comprising: alternately selecting theintegrated sample values for each related set thereof for digitizingthereof by an analog to digital converter in a time shared relationship,and storing the digitized sample values of the related output samplesfor simultaneous processing thereof.